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MICRO ELECTRONICS, VLSI DESIGNER : Resume CV
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MICRO ELECTRONICS, VLSI DESIGNER : Resume CV
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[QUOTE=Guest;259794]The HR Manager , Chip Design pvt. Ltd. [b][i][u]Sub [/u][/i][/b]: Cover Letter – Vlsi Fresh Engineer Dear Sir/ Madam, - I am writing in response to your job notification for the position of fresh engineer. - I am a B.E. in Electronics and Telecommunication with an aggregate of 67% marks. - I have worked on SPI, IIC protocol in my industrial training project. - I also have a good knowledge of C,Verilog and system verilog. [b][i][u]Some of my personal qualities which you may find useful for this role are [/u][/i][/b]: - Good team worker. - Adaptable to any kind of environment and can work under pressure. - Good thinker. Please find my detailed CV for your consideration. Should you need any more details, please do let me know. Thanking you for your time and looking forward to hear from you. Sincerely, Knaujiya Deepak Ramkishun deepakkanaujiya05 AT gmail.com, [b][i][u]Dated [/u][/i][/b]:15/02/2013 VLSI Trained Engineer DEEPAK RAMKISHUN KANAUJIYA [b][i][u]Email [/u][/i][/b]:deepakkanaujiya05 AT gmail.com [b][i][u]TECHNICAL SKILLS [/u][/i][/b]: Electronic Design Packages XilinxISE 14.1, ModelSim SE 6.4a,6.5c, QuestaSim6.6d Programming Languages Verilog, System Verilog, VHDL, C, Microcontrollers / FPGA 8051 Microcontroller, FPGA spartan3, Familiar Protocols IIC BUS,SPI BUS Familiar OS Windows xp, 2007, Linux, [b][i][u]PROJECT WORK [/u][/i][/b]: [b][i][u]1.Project Title [/u][/i][/b]:“Design and Implement a RTL Design IIC-SPI Bridge” (Nov,2012). [b][i][u]Software [/u][/i][/b]: XilinxISE 14.1, ModelSim SE 6.4a,6.5c [b][i][u]Hardwar [/u][/i][/b]: FPGA Kit [b][i][u]Description [/u][/i][/b]: The Bridge works as an I2C slave and an SPI master. It receives commands from the I2C master and then writes or reads data to the SPI slave depending on the command received. The PSoC device Firmware interacts with the I2C block through register reads and writes. [b][i][u]2.Project Title [/u][/i][/b]: Universal Asynchronous Receiver Transmitter Using Verilog HDL [b][i][u]Software [/u][/i][/b]: XilinxISE 14.1, ModelSim SE 6.4a,6.5c [b][i][u]Hardware [/u][/i][/b]: FPGA Kit [b][i][u]Description [/u][/i][/b]: The main aim of the project is to design and program FPGA board that is capable of transmitting and receiving data from one device to another. [b][i][u]ACADEMIC PROJECTS [/u][/i][/b]: [b][i][u]1.Project Title [/u][/i][/b]: “DIGITAL IMAGE WATERMARKING USING MATLAB”. [b][i][u]Software [/u][/i][/b]: MATLAB [b][i][u]Description [/u][/i][/b]: Digital watermarking is a technology for embedding various types of information in digital content. In general, information for protecting copyrights and proving the validity of data is embedded as a watermark. A digital watermark is a digital signal or pattern inserted into digital content. [b][i][u]1.Seminar Title [/u][/i][/b]: “QUANTUM CRYPTOGRAPHY ”. [b][i][u]Description [/u][/i][/b]: Transmitting information with access restricted to the intended recipient even if the message is intercepted by others. [b][i][u]PROFESSIONAL COURSES [/u][/i][/b]: I Completed Professional Development program, VLSI Design and Functional Verification from Sandeepani School of VLSI Design. [b][i][u]EDUCATION [/u][/i][/b]: Name of course /degree University/Board Specialization Year Pass Out Aggregate B.Tech North Maharashtra University E&TC 2012 67.56% 12th Mumbai Board SCIENCE 2008 69,17% 10th Mumbai Board 2006 77.73% [b][i][u]ACCOMPLISHMENTS [/u][/i][/b]: At School Level Participate in cricket in inter-school tournament. Won in kabaddi tournament. At College Level Attended 3 days HR training in college campus Organised National level event in college by name”CIRCUIT MANIA”. Attend 1 week training on 32- Bit ARM Processor and Mcos by Oasis Education. [b][i][u]PERSONAL SKILLS [/u][/i][/b]: - Comprehensive problem solving abilities. - Willingness to learn team facilitator hard worker. [b][i][u]PERSONAL DETAILS [/u][/i][/b]: Father’s Name RAMKISHUN KANAUJIYA D.O.B 5 JUNE 1991 Email ID deepakkanaujiya05 AT gmail.com [b][i][u]DECLARATION [/u][/i][/b]: I do here by declare that all the above statements are true to the best of my knowledge and belief. Place- Signature of the Candidate Date- Deepak R.kanaujiya[/QUOTE]
