MICRO ELECTRONICS, VLSI DESIGNER : Resume CV

[Guest]

V.SANTOSH KUMAR
Pune – 411057
Email : santoshi2it AT gmail.com

To pursue and excel in a professional career, with the best technical foundation, in order to explore newer and challenging
technologies with sincerity, hard work and determination.

CORE COMPETENCIES :
- Analog design
- Asic modeling and Digital design
- Verification and validation
- Printed Circuit Board design
- Physical Layout design
- Low power IC design
- Design for Testability

TECHNICAL PROFICIENCY :
- Programming Language : C
- Assembly Languages : 8085, 8086, 8051. (Microprocessors and Microcontroller).
- HDL Languages : VHDL,VERILOG.Pspice
- Operating systems : Windows98/XP/Vista, Linux.
- Scripting Languages : Perl (Beginner).
- EDA Tools : Cadence: ICFB, RC-RTL Compiler, First Encounter, Orcad Schematic Capture,
NC launch, Xilinx Project Navigator, Modelsim.

ACADEMIC QUALIFICATIONS :
- Pursuing Post Graduation (M-Tech) In MICRO ELECTRONICS AND VLSI DESIGN from International Institute of Information Technology, Pune in 2010 with 3.6 GPA out of 4.0 up to first semester (now in third semester and looking for Internship to do my final project).
- B.Tech with specialization in ELECTRONICS AND COMMUNICATION from Jyothishmathi institute of science
and technology, Karimnagar affiliated to JNTU, Hyderabad in 2009 with 63.31%
- INTERMEDIATE from Sri Chaitanya JNR College, Hyderabad in 2005 with 83.1%
- 10th from State Board of Secondary Education in C.G.C High School, Devapur in 2003 with 87.6%.

ACADEMIC PROJECTS :
project1 :
Organization : International Institute of information Technology.
Title : Design of CMOS Inverter as a Comparator in ADC designs.
Tools : Cadence: ICFB (up to GDS-II)
Duration : 2 months (2009)
Team Size : 1
Description : The project goal is the design of a Comparator, which can be used in ADC design using CMOS
Inverter. This is designed using GPDK 180nm technology. The TIQ is based on a CMOS Inverter cell, in which the voltage Transfer characteristics (VTC) are changed by systematic transistor sizing. As a result, a significant improvement of speed and reduction of area and power consumption is achieved.

project2 :
Organization : International Institute of information Technology.
Title : Virtual prototyping of Dual Tone Multiple Frequency Receiver using 180nm technology
Tools : Cadence: SOC Encounter XL
Duration : 3 months (2010)
Team Size : 2
Description : The DTMF design contains almost 6,000 instances, 57 IO pads and about 6,274 nets. The netlist format is hierarchical Verilog. It has several clock sources and hierarchical nets. The process used is the Artisan 180 nanometer process technology with 6 layers of metal. These Artisan library files, such as the timing libraries and LEF, are downloaded from the Cadence Learning Management System website. Virtual prototyping is used to quickly determine the feasibility of the DTMF design. The design inputs are the netlist, floor plan, clock sources, and timing constraints. The process/technology inputs are the physical libraries, timing libraries, process technology libraries. The design is imported, floor planned, nano placed, trial routed, RC extracted, clock tree synthesized, optimized for timing and nano routed.

project3 :
Organization : International Institute of information Technology.
Title : Sound processing on DE2 board.
Tools : ALTERA DE2 board, QUARTUS II.
Duration : 2months (2010)
Team Size : 2
Description : The main objective is to implement I2S, I2C protocols. Sources of sound are given as the input from Mic-in, line-in ports. Output has to be verified at the line-out port.

project4 :
Organization : Jyothismathi Institute of Technology and Science.
Title : Design, implementation and verification of the DLX processor.
Tools : Cadence NCsim, Xilinx ISE
Team Size : 4
Duration : 4 months (2009)
Description : The main objective is to Design, implement and verify a 32bit hypothetical RISC processor. We have done coding for the processor and we crosschecked with different types of the hazards that might occur.

ACADEMIC ACHIEVEMENTS :
- Submitted a paper on “Optimization techniques for Mixed signal Printed Circuit Boards” in international paper conference held at Coimbatore College of Engineering. Conducted by “ICNVS” with the collaboration of WSEAS.
- Selected a paper on “Design of A-to-D converter using TIQ approach” at “Singapore 2010 WASET conference”.
- Won prize for the paper “Future trends of VLSI design” conducted by IEEE society.

EXTRACURRICULAR ACTIVITIES :
- Work experience of 4months as Lab Assistant at I2IT.
- Undergone one week training at CEERI, Pilani on Fabrication of Integrated Circuit.
- Secured 2nd prize in “The Design Idea Contest” sponsored by NXP semiconductors.
- Secretary of I2IT Students Library Committee (SLC).
- Won 2nd prize for poster presentation on “Neuromorphic engineering”.

PERSONAL DETAILS :
Date of Birth : 23th March, 1988
Languages Known : English, Hindi, and Telugu.
Father Name : V. Madhusudan
Personal : Male/Unmarried.
Email : santoshi2it AT gmail.com

(V. Santosh Kumar)

[Guest-IJT]

Design engineer

RESUME
MANU.T
manu.t AT skanray.com

CONTACT ADDRESS :
kasaragode(DT)
Kerala-671353

CAREER OBJECTIVE :
To seek an intellectual work environment that is diverse, dynamic and exposed to new technologies, challenging my technical abilities, analytical knowledge, testing skills, where I can give my best performance & skills for improvement of organization & self by learning new skills and enhance my knowledge.

EDUCATIONAL QUALIFICATION :
Qualification Board/University Year of Passing Percentage Obtained (%)
SSLC BOARD OF KERALA 2005 85%
PLUS 2 BOARD OF KERALA 2007 76%
DIPLOMA IN ELECTRONICS NTTF 2010 78%

TECHNICAL EXPOSUR :
Software 8051-KEIL, Protal PCB, P-Spice, Circuit Maker, Mat lab, AutoCAD,MS Office, Coral draw.
Languages C, C++ and VB Programming.
Operating Systems Windows 98, 2000, Windows XP, Vista, Windows 7,
Microprocessor & Microcontroller 8085, 8051 family (Programming)
Hardware PC Troubleshooting, Maintenance, Assembling and Installation
Mechanical PCB Design & Fabrication
Production Mounting, Soldering and De-Soldering
Others Equipment Maintenance, Troubleshooting and Servicing

PROJECT UNDERTAKEN :
1. LED BASED MESSAGE DISPLAY
2. EMBEDDED BASED INFORMATION ACESS SYSTEM USING TOUCHSCREEN

OTHER SKILL SETS :
- Electronic Manufacturing Techniques : Soldering, De-Soldering, Wire harnessing.
- Able to make technical documentation.
- Design and Analyze Sequential and Combinational Digital Logic circuits.
- Analyze and troubleshoot equipments like Power Supply, Function. Generator, Digital Trainer kit and Oscilloscope.
- Design and Implement Microprocessor based systems.
- Design and Implement Microcontroller based systems.
- Design and Implement Basic Electronics circuits .
- Design and Fabricate PCB.

AREA OF INTEREST :
- Power Electronics
- Hardware designing
- Analog Electronics
- Testing
- Troubleshooting
- Digital Electronics
- Programming
- Software designing

ACHIEVEMENTS :
- Coordinated arts day, sports day
- Coordinated for 5S, Industrial visit
- Participated in Village Camp 2009
- Participated in kala sangama 2009
- RASHTRAPATHI&RAJYAPURASKAR SCOUT

PERSONAL DETAILS :
Name : MANU T
Date of birth : 05/05/1990
Gender : Male
Marital Status : Single
Nationality : Indian
Languages Proficiency : English (To Speak, To Read, To Write)
Hindi (To Speak, To Write, To Read)
Malayalam (To Speak, To Read, To Write)
Tamil (To Speak).
Hobbies : Listening to music.
Playing games-volly ball,cricket, foot ball.

DECLARATION :
I here by declare that all the information given by me is true to
the best of my knowledge and belief.

Date : 26-07-2010 Signature
Place : KASARAGODE (MANU T)

[Guest]

CURRICULUM VITAE
Name : JASEEN.A
E-mail IDs : anjujaseen AT gmail.com
jaseenomana AT hotmail.com
Career Objective :
To work with commitment and dedication towards the growth of the organization and secure a challenging position in a reputed company that offers skill enhancement and growth while being resourceful , competent and upholding ethics.
Educational Qualification
Course Name of the institution Board/ University Year Percentage
B.Tech Sarabhai Institute of Science & Technology CUSAT 2011 with 64.57%
(back papers)
HSE Govt. Higher Secondary School Anchalumood, Kollam
State in 2007 with 76%
SSLC St. Joseph’s Convent girls Higher Secondary School, Kollam
STATE in 2005 with 73%

Mini Project : Safety Guard For The Blind
Description :
For the Blind, its difficult to step out without someone’s help. To make the life simpler for them , an electronic safety guard system that alerts them of any obstacles or object in their path. The system can detect obstacles within 1 meter. Here we are installing the system into a blind Man’s stick.
Major Project : VFD based Energy Management inCompressor
Description :
A variable Frequency Drive (VFD) is a device that strategically reduces the power supplied to mechanical equipments. The ability to manipulate the output voltage permits VFDs to control the speed and therefore the power consumption of a compressor, pumps and fan
Skill Set
Programming Language : C,C++
Operating Systems : Windows XP, M.S Office
Strengths
Friendly, Optimistic, Self-Motivator
Hobbies
Reading books, searching internet for various details , listening to music, Gardening
Credis
- Participated in various seminars conducted in college
- Member of Instrumentation Society

[Guest]

V.V.S.LAVANYA
Email : lavanyavema AT gmail.com
CAREER OBJECTIVE
Work for the growth of the organization in the domain of digital design and VLSI research by maximizing my contribution through technical, analytical and professional skills.

ACADEMIC QUALIFICATIONS
COURSE /DEGREE COLLEGE / INSTITUTE/ UNIVERSITY YEAR OF PASSING PERCENTAGE /CLASS / GRADE
M.Tech (Microelectronics and VLSI Design) I2IT-IGNOU Centre of Excellence for Advanced Education and Research,Pune Jan 2013 7.8(SEM-1)
Graduation( Electronics and Communication) Geetanjali Institute of Technical Studies, Udaipur 2010 68%
Higher Secondary (12th) K.V.O.N.G.C, Ahmedabad 2006 60.4%
Secondary School (10th ) K.V.O.N.G.C, Ahmedabad 2004 64.4%
SKILL SETS
Self motivative, Adaptable, Patient, Punctual, Spontaneous
Technical skills :
Programming Languages : C, Verilog
Operating System : MS-DOS, Windows 7, Ubuntu
Packages : MS Office
Designing : DSCH, Microwind, P-spice, Quartus, Cadence, Xillinx ISE ,NC Launch.
PROJECT DETAILS
PROJECT1 :
Name of the project : Programming in Altera FPGA Kit
Description : Interfacing the kit with key board, with LCD and with monitor.
PROJECT 2 : Team size-2
Name of the project : Display of Stop clock on CPLD Board
Description : With Xilinx CPLDs we have displayed Stop clock on a seven segment display using Verilog coding. .
PROJECT 3 : Team size-2

Name of the project : Design of Phase meter using 8254
Description : Phase meter is a device which is used to measure the phase difference between two signals using 8254 assembly language. It is done by using different types of gate IC’s and seeing the output in the CRO. Comparing the phase of signal 1 & signal 2 gives the difference.
PROJECT 4 : Team size-3
Name of the project : Study and Implementation of 6T SRAM
Description : Studied about the advantages of 6t over 4t single ended static random access memory. Precharge circuit, sense amplifier, buffer, row & column decoder are used. For read and write operation Cross coupled amplifier is used.
EXTRA CURRICULAR ACTIVITIES
1. Volunteer 2 International Conferences of IEEE(2008 & 2009).
2. Member of Organizing committee of Dhruva event(2011) at ISquareIT Pune.
3. Member of Sports committee from ECE branch in 2008-2010.
4. Participated in cultural and sports activities held at school and college levels.
5. Played Kabbadi and Kho-Kho at National level In 2003 at Delhi.
6. Won medals in Disc throw, shot-put, chess, carrom & badminton.

I declare that information given in the resume is true to the best of my knowledge.
Place : PUNE (V.V.S.LAVANYA)

[Guest]

The HR Manager ,
Chip Design pvt. Ltd.

Sub : Cover Letter – Vlsi Fresh Engineer

Dear Sir/ Madam,
- I am writing in response to your job notification for the position of fresh engineer.
- I am a B.E. in Electronics and Telecommunication with an aggregate of 67% marks.
- I have worked on SPI, IIC protocol in my industrial training project.
- I also have a good knowledge of C,Verilog and system verilog.

Some of my personal qualities which you may find useful for this role are :
- Good team worker.
- Adaptable to any kind of environment and can work under pressure.
- Good thinker.

Please find my detailed CV for your consideration. Should you need any more details, please do let me know.

Thanking you for your time and looking forward to hear from you.

Sincerely,
Knaujiya Deepak Ramkishun
deepakkanaujiya05 AT gmail.com,

Dated :15/02/2013

VLSI Trained Engineer

DEEPAK RAMKISHUN KANAUJIYA
Email :deepakkanaujiya05 AT gmail.com

TECHNICAL SKILLS :
Electronic Design Packages XilinxISE 14.1, ModelSim SE 6.4a,6.5c, QuestaSim6.6d
Programming Languages Verilog, System Verilog, VHDL, C,

Microcontrollers / FPGA 8051 Microcontroller, FPGA spartan3,
Familiar Protocols IIC BUS,SPI BUS
Familiar OS Windows xp, 2007, Linux,

PROJECT WORK :
1.Project Title :“Design and Implement a RTL Design IIC-SPI Bridge” (Nov,2012).
Software : XilinxISE 14.1, ModelSim SE 6.4a,6.5c
Hardwar : FPGA Kit
Description : The Bridge works as an I2C slave and an SPI master. It receives commands from the I2C master and then writes or reads data to the SPI slave depending on the command received. The PSoC device Firmware interacts with the I2C block through register reads and writes.

2.Project Title : Universal Asynchronous Receiver Transmitter Using Verilog HDL
Software : XilinxISE 14.1, ModelSim SE 6.4a,6.5c
Hardware : FPGA Kit
Description : The main aim of the project is to design and program FPGA board that is capable of transmitting and receiving data from one device to another.

ACADEMIC PROJECTS :
1.Project Title : “DIGITAL IMAGE WATERMARKING USING MATLAB”.
Software : MATLAB
Description : Digital watermarking is a technology for embedding various types of information in digital content. In general, information for protecting copyrights and proving the validity of data is embedded as a watermark. A digital watermark is a digital signal or pattern inserted into digital content.

1.Seminar Title : “QUANTUM CRYPTOGRAPHY ”.
Description : Transmitting information with access restricted to the intended recipient even if the message is intercepted by others.

PROFESSIONAL COURSES :
I Completed Professional Development program, VLSI Design and Functional Verification from Sandeepani School of VLSI Design.

EDUCATION :
Name of course /degree University/Board Specialization Year Pass Out Aggregate
B.Tech North Maharashtra University E&TC 2012 67.56%
12th Mumbai Board SCIENCE 2008 69,17%
10th Mumbai Board 2006 77.73%

ACCOMPLISHMENTS :
At School Level
Participate in cricket in inter-school tournament.
Won in kabaddi tournament.
At College Level
Attended 3 days HR training in college campus
Organised National level event in college by name”CIRCUIT MANIA”.
Attend 1 week training on 32- Bit ARM Processor and Mcos by Oasis Education.

PERSONAL SKILLS :
- Comprehensive problem solving abilities.
- Willingness to learn team facilitator hard worker.

PERSONAL DETAILS :
Father’s Name RAMKISHUN KANAUJIYA
D.O.B 5 JUNE 1991
Email ID deepakkanaujiya05 AT gmail.com

DECLARATION :
I do here by declare that all the above statements are true to the best of my knowledge and belief.

Place- Signature of the Candidate Date-
Deepak R.kanaujiya