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[QUOTE=Guest;195862]RESUME 
 NAGA PRAKASH IRRINKI 
 [b]Email [/b]: vvnprakash AT gmail.com 
__________________________________________________________________________________
[b]OBJECTIVE [/b]:
 Aspiring for a challenging career in an organization that would utilize and develop my skills, while offering opportunities for continuous learning and innovation.
[b]EXPERIENCE SUMMARY [/b]:
- Working as an Assistant professor in a private institution and having an experience of 3 years. 
- Having 3 years experience in dealing the VHDL laboratory 
- Proficient in developing code for the modules of projects in VHDL.
[b]SKILL SET [/b]:
 [b]Operating Systems  [/b]: Windows XP.
 [b]Software Languages [/b]: C, C++.
 [b]Hardware languages [/b]: VHDL, Verilog.
[b]PROJECTS HANDLING [/b]:
[b]Project Name [/b]: DOUBLE ELEVATOR USING VHDL.
[b]Role [/b]: Analyst.
[b]Description [/b]:
- The main objective of my project is the implementation of double elevator in VHDL.
- It consists of two elevators working simultaneously and it is controlled with an FPGA chip.
- Here in my project, the tool on which I worked out the project is XILINX 8.2i and the synthesizable chip is SPARTEN 3e
 
[b]Accomplishments [/b]:
- Within a span of one month the modules were successfully developed without any one’s guidance, therefore reduced the dependency on others, for which a new comer wants.
[b]Responsibilities [/b]:
- Designing the module in the project.
 
[b]Project name [/b]: FFT Processor Design Based on CORDIC Algorithm using VHDL (Dec 08 to Mar09).
[b]Role [/b]: Analyst
 [b]Description [/b]:
- The main objective of my project is to provide an easy solution to computing a wide range of functions.
- These functions include certain trigonometric, hyperbolic, logarithmic and linear functions.
- This CORDIC (Coordinate Rotational Digital Computer) algorithm is a ‘shift’ & ‘add’ algorithm which is having four modules namely ADDRESS block, CORDIC block, SCALAR block and MEMORY block.
- The ADDRESS block contains the information about, which two points are used in FFT (Fast Fourier Transformation) operation and corresponding scalar addresses.
- In CORDIC block ‘shift’ and ‘addition’ operation takes place. It also generates the corresponding angels, which were used in the addition operation.
- The SCALAR block gives corresponding scalarity in the addition operation and MEMORY stores these values for the next stages. 
- There are numerous articles covering various aspects of CORDIC algorithms. Very a few surveys more than one and two, and fewer concentrate on implementation in FPGAs.
 [b]Responsibilities [/b]:
- Developing code for CORDIC and MEMORY modules.
- Active contribution in developing code for SCALAR and ADDRESS modules.
- Thorough testing of all the four modules with various logics.
[b]______________________________________________________________________________ACADEMIA [/b]:
- B.Tech Electronics and Communication Engineering from Swarnandhra College of Engineering and Technology, Narsapur affiliated to J.N.T.U, Kakinada, passed out in 2009 with distinction with 72.10%.
- Intermediate, passed out in 2005 with 90.4%.
- Secondary School Certificate (SSC), passed out in 2003 with 79.33%.
[b]---------------------------------------------------------------------------------------------------------------------------------------------------------------------Date of Birth [/b]: 4th November 1987. 
 References and relevant Documents will be furnished upon Request.[/QUOTE]

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