www.xilinx.com India Technology Services Pvt Ltd Hyderabad : Verification Engineer

[Admin]

Xilinx leads the Programmable Logic Device (PLD) market - one of the fastest growing segments of the semiconductor industry. Founded in 1984 and headquartered in San Jose, California, we are a $1.9 billion company with an employee base of over 3300 professionals across our global offices. We take pride in nurturing innovation and providing our employees with a values-driven and rewarding workplace.
Designation :Verification Engineer / Lead
Job Description :

Looking for Verification Engineer/Lead.
Desired Profile :

Job Description :
** B.E/M.E/M.Tech or B.S/M.S in EE/CE with 8+ years of relevant experience.
** 3+ years of OOP coding experience (Vera, System Verilog, SpecmanE or C++)
** Excellent Verilog and logic design concepts
** Knowledge of memory controllers such as DDR2/DDR3 and buses like AXI/AHB
** Strong working knowledge of UNIX environment and scripting languages such as Perl
** Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, Verdi and ModelSim.
** Experience in using Revision control and bug tracking tools.
** Excellent communication and problem solving skills
** Should have experience working in geographically dispersed team and should be a strong team player.

Experience :3 - 8 Years
Industry Type :IT-Software/ Software Services
Role :Hardware Design Engnr
Functional Area :IT-Support, Telecom, Hardware
Location :Hyderabad / Secunderabad
Keywords :System Verilog, Vera
Contact :Xilinx India Technology Services Pvt Ltd
Website :http://www.xilinx.com

Xilinx India Technology Services Pvt. Ltd.
Unit 04-01, Block I,
Cyber Pearl,
Hi-tec City, Madhapur,
Hyderabad - 500 081
India

Ph: +91-40-23144000
Email Us: xilinxindia_staffing@xilinx.com

Visit Us: www.xilinx.com

[Guest-IJT]

Name : NADEER.R
Email : nadeerrasheed AT gmail.com
Designation / Skillset : technical trainee
RESUME OF NADEER.R

Resume :
NAME :NADEER R
DEGREE : B.E.(Electronics& Communication)
To be part of a company with rich heritage of creativity and innovation where my skills are put to optimal use and which gives me a platform to improve myself in multiple dimensions and organize a team under my leadership.
CLASS / COURSE NAME OF THE
INSTITUTION BOARD OF STUDY YEAR OF PASSING MARKS%
B.E.(ECE)
Odaiyappa College Of Engineering, Theni. Tiruchi Anna University 2011 68
XII
N S S G H S S, Perunna,Changanacherry
State board 2007 64
X N S S B H S Perunna,Changanacherry State board 2005
60
- Mobile communication.
- Operating System : Windows 98/XP , Vista, window 7
- Application Software : MS Office
Am successfully completed the full time training on Industrial Training On Telecom Technologies conducted by Bharath Sanchar Nigam Limited (BSNL) Trivandrum, from 25-05-2011 to 04-06-2011.
Main Project Details
Title ”PSEUDO EXHAUSTIVE TWO PATTERN GENERATOR(VLSI)”
(Developed as a part of B.E(ECE)VIII SEMESTER
syllabus.)
Description In this project we are using BIST technique.it is used in VLSI circuits for both detect and correct the errors.for detect the errors it has used reseeding technique and correct the error it has used roving star method.it has high speed,lesser area and low power consumption than existing systems.the main application is networking,internet and wireless.the main advantages are low cost,more efficient,more speed and good performance.
Team Size 3
Duration 4 months
- One of the Organizers of “MYRMIDONS 2K10” a National level Students’ Technical Symposium in our college.
- Captain of our school cricket team
- Organized several programs in our school as a leader
- Organized several functions of our college successfully.
COICULAR ACTIVITIES
- Participated in “EXYPNOS ‘09”, conducted by dept. Of CSC, Odaiyappa College of Engg and Tech in PAPER PRESENTATION, Quiz.
- Participated in “PYRRHIC “09”, conducted by dept. Of ECE, Odaiyappa College of Engg and Tech in PAPER PRESENTATION, Quiz.
- Participated in seminar in “AMERICAN UNIVERSITY OF INDIA KODAIKANAL ”on 19th October 2010.
-
- Participated in several BLOOD DONATION camps.
- Participated in dance competitions in school days
Chatting and Surfing
Playing cricket
Listening music

I hereby declare that all the statements written above are true.


PLACE : CHANGANACHERRY (NADEER R)
DATE :23-06-2011
-------------------------------------------------------
More Information about this submission and submitter :-
___________________________________________________
Submission ID : 4356034
Date & Time : 11th Jul 2011 4:29 AM (UTC)
IP Address : 117.206.34.95
Browser Info : Mozilla/5.0 (Windows NT 6.1) AppleWebKit/534.30 (KHTML, like Gecko) Chrome/12.0.742.112 Safari/534.30
Predicted Country : India

[Guest]

RESUME

S AVINASH VARMA
Email :
avinashvarma443 AT gmail.com


Career Objective :
To pursue a highly challenging career,where I can apply my knowledge, acquire new skills and contribute constructively to the organization.
Educational Qualifications :
Qualification
Stream
Institute
Board/university
Year
%
B.Tech
E.C.E BVC Engineering
college JNTU-KAKINADA 2007-2011
77.7
Intermediate
M.P.C Aditya junior college, amalapuram Board of Intermediate Education. 2005-2007
94.5

S. S. C
- AVB high school Board of secondary Education. 2004-2005
85.5
Main Project details :
Project : Patient Monitoring And alert system using GSM
Team size : 4
Role : Leader
Description :
In this project heart beat rate and body temperature are given to comparator as analog values continuously. Whenever the heart beat rate or body temperature are in the abnormal level, comparator output will be varied. Microcontroller sends the message using GSM modem via max232 to the predefined phone no.
Skill Set :
- Electronics : Embedded Systems, RADAR Applications, VLSI
- Languages : C, java basics.
- Package : MS-Office.
Achievements :
- Participated in national level paper presentation.
- Member of my school Volley ball team.

. Strengths :
- Stability.
- Adaptability.
- Flexibility.
- Positive Attitude.
Hobbies :
- Playing cricket.
- Stamp collection.
- Reading news papers.

[jhalamayur]

E-MAIL :
jhalamayur AT gmail.com

JHALA MAYURDHVAJSINH S.
OBJECTIVE
Looking for challenging career, where there is scope for demonstration, always on a look out for a positive & bigger outlook, Currency are ideas, thrive on Imagination & Passion, Rigorous thinking and boundless curiosity, Sets levels & standards that exceed expectations. Have fun attitude is everything. Bottom line rises with the Organisation, A Learner for Life.
ACADEMIC RECORD BE AGGREGATE 60.35
QUALIFICATION UNIVERSITY
OR BOARD YEAR OF PASSING RESULT (%)
B.E. E&C. N.M.U., Jalgaon 2011 66.78%
T.E. E.C. N.M.U. 2010 55.07 %
S.E. E.C. N.M.U. 2009 58.27 %
F.E. E.C. N.M.U. 2008 61.64 %
DIPLOMA ELECTRICAL T.E.B. 2006 58.94 %
S.S.C. G.S.E.B 2003 65.00 %

SOFTWARE EXPERTISE
- Courses : Industrial automation ,CCNA , Doeacc ‘O’ Level
- Operating System : Windows 98/2000/XP/Vista/7, LINUX, MS-DOS.
- Domain Of Interest : Power sector, PLC, SCADA, NETWORKING
ACADEMIC PROJECT DESCRIPTION
B.E. (FOURTH YEAR)
PROJECT TITLE : IRIS RECOGNITION USING ANN
DESCRIPTION : Iris recognition is one of important biometric recognition approach in a human identification is becoming very active topic in research and practical application. system consists of localization of the iris region and generation of data set of iris images followed by iris pattern recognition. The source code is implemented using MATLAB 7.
LANGUAGES KNOWN :
GUJRATI
HINDI
ENGLISH

INTERESTS AND HOBBIES :
PHOTOGRAPHY,
BOOKS,
PAINTING,
MUSIC,
MAKING FRIENDS,
HORSE RIDING,
SPORTS (CRICKET).
PERMANENT ADDRESS
AS ABOVE

DIPLOMA ELECTRICAL
PROJECT TITLE :SOLAR CAR
DESCRIPTION : The main purpose of designing SOLAR CAR is energy saving and pollution free transportation. Also good solution for shortage of fossil fuel and efficient use of solar energy.
EXTRA ACTIVITY
- DOEACC ‘O’ LEVEL
- Industrial automation ,CCNA
- Two National Level NCC CAMP
- Paper Presentation
- Management Work Social Activities
- Project building completion
PERSONAL SKILLS
- Knowledge of two different Field
- Effective leadership qualities
- Ability to work in multi-functional environments
- Excellent communication and inter-personal skills
- Good problem-solving skills
- Adjustable to situations
- Quick and accurate analysis of situations.

[Guest]

RESUME
NAGA PRAKASH IRRINKI
Email : vvnprakash AT gmail.com
__________________________________________________________________________________
OBJECTIVE :
Aspiring for a challenging career in an organization that would utilize and develop my skills, while offering opportunities for continuous learning and innovation.
EXPERIENCE SUMMARY :
- Working as an Assistant professor in a private institution and having an experience of 3 years.
- Having 3 years experience in dealing the VHDL laboratory
- Proficient in developing code for the modules of projects in VHDL.
SKILL SET :
Operating Systems : Windows XP.
Software Languages : C, C++.
Hardware languages : VHDL, Verilog.
PROJECTS HANDLING :
Project Name : DOUBLE ELEVATOR USING VHDL.
Role : Analyst.
Description :
- The main objective of my project is the implementation of double elevator in VHDL.
- It consists of two elevators working simultaneously and it is controlled with an FPGA chip.
- Here in my project, the tool on which I worked out the project is XILINX 8.2i and the synthesizable chip is SPARTEN 3e

Accomplishments :
- Within a span of one month the modules were successfully developed without any one’s guidance, therefore reduced the dependency on others, for which a new comer wants.
Responsibilities :
- Designing the module in the project.

Project name : FFT Processor Design Based on CORDIC Algorithm using VHDL (Dec 08 to Mar09).
Role : Analyst
Description :
- The main objective of my project is to provide an easy solution to computing a wide range of functions.
- These functions include certain trigonometric, hyperbolic, logarithmic and linear functions.
- This CORDIC (Coordinate Rotational Digital Computer) algorithm is a ‘shift’ & ‘add’ algorithm which is having four modules namely ADDRESS block, CORDIC block, SCALAR block and MEMORY block.
- The ADDRESS block contains the information about, which two points are used in FFT (Fast Fourier Transformation) operation and corresponding scalar addresses.
- In CORDIC block ‘shift’ and ‘addition’ operation takes place. It also generates the corresponding angels, which were used in the addition operation.
- The SCALAR block gives corresponding scalarity in the addition operation and MEMORY stores these values for the next stages.
- There are numerous articles covering various aspects of CORDIC algorithms. Very a few surveys more than one and two, and fewer concentrate on implementation in FPGAs.
Responsibilities :
- Developing code for CORDIC and MEMORY modules.
- Active contribution in developing code for SCALAR and ADDRESS modules.
- Thorough testing of all the four modules with various logics.
______________________________________________________________________________ACADEMIA :
- B.Tech Electronics and Communication Engineering from Swarnandhra College of Engineering and Technology, Narsapur affiliated to J.N.T.U, Kakinada, passed out in 2009 with distinction with 72.10%.
- Intermediate, passed out in 2005 with 90.4%.
- Secondary School Certificate (SSC), passed out in 2003 with 79.33%.
---------------------------------------------------------------------------------------------------------------------------------------------------------------------Date of Birth : 4th November 1987.
References and relevant Documents will be furnished upon Request.