SOC Synthesis/STA/DFT Implementation Engineer & Team Leaders

Job Opening* 2010

Required Skills :

* BE or diploma in VLSI design + 3 yrs experience in SOC Implementation

* Experienced on Synopsys and Cadence Synthesis tools (ICC, RC, DC-Shell)

* Experience on Synopsys PrimeTime Static Timing Analysis

* Timing closure experience

* Understanding of DFT and experience on DFT tools a plus

your resume at careers@chipsculpt.com

About us :
Chipsculpt is your solutions partner. We provide design, verification and backend services for complex ASIC/SOC, FPGA, and IP products.Chipsculpt leverages its excellent local technical resource base with the international program management expertise of its senior management to provide low cost and very high quality design and verification services to clients all over the world.The chipsculpt team has successfully executed front-end and backend projects from customers from around the globe.

Contact us :
Chipsculpt
G/1, Upasani Krupa,
Malviya Road, Vile Parle (East),
Mumbai 400057, India
Phone : 91-22-2610 8807 / 91-98208 97464
http://www.chipsculpt.com