Cadence Design Systems India Pvt Ltd Bangalore : Training Allegro, OrCAD PCB Design

[Admin]

With Cadence Education Services, find out how easy it is to adopt new technologies and realize the many advanced capabilities they provide you. We can help you get the most out of your investment through a wide range of education offerings, from instructor-led classes based on standard courses, to customized curriculums, or our Internet Learning Series (ILS) online courses.

Classes may be cancelled due to low enrollment. Please contact us if you are interested in any Cadence training not listed below.Open slots may be scheduled for any customer specific training requirement.
Contact : nsushma@cadence.com for any other query.

Other training conducted on request :
[LIST][*]Verification: SystemC, SCV, SVA, Advanced Specman, IUS Comprehensive Coverage, Formal Ananlysis with IFV, Palladium & Xtreme- TBA, ABA, SimAccel and Ice.[*]Custom IC: Aptivia, Neockt, Ultrasim, spectre, VLE, VCE, VCAR, Neocell.[/LIST]


Course Title Allegro PCB Power Integrity-v16.01
Course Category Allegro & OrCAD PCB Design
Duration 1 Day
Course ID ES_86073_16_01
Product Version 16.01

Allegro® PCB PI Option XL is a software tool that provides a coherent methodology for the design and fabrication of power distribution systems (PDS) in high-speed printed circuit boards (PCB). Power distribution system design includes voltage regulator modules, decoupling capacitors, and power/ground planes. You need the PCB Power Integrity tool Allegro PCB PI Option XL to assist you in the design of a stable power distribution system to support high-speed circuit operation.

Allegro PCB PI Option XL tool allows you to:

oMinimize common-impedance coupling and common-mode switching noise.
oMinimize or eliminate signal integrity problems related to power supply droop.

Learning Objectives
In this course you will learn to:
oSet up a board database for analysis.
oDefine a target impedance.
oPerform single-node analysis to validate and refine your capacitor selection.
oPerform multi-node analysis to refine your placement.
oCreate and edit capacitor models.
oAdd vendor-supplied capacitor models to a capacitor library.
oAssign capacitor models to an existing printed circuit board.

Audience
oElectrical Engineers
oDesign Engineers
oCadence Application Engineers
oAnalog Designers

Prerequisites
oAllegro PCB SI Foundations


India Regional Offices
Cadence Design Systems India Pvt Ltd.
2nd Floor, 3B Building, RMZ Ecospace
Sarjapur Outer Ring Road
Bangalore 560 037 India
Phone: +91.80.4184.1111, 4520.1111
Fax: +91.80.4184.1122, 4520.1122

Cadence Design Systems India Pvt Ltd.
Office No 114, DBS Business Centre
S P Road
Secunderabad - 500003 India
Phone: +91-40-40023500
Fax: +91-40-2784 6855

http://www.cadence.com/in/pages/default.aspx

[Guest]

Sir,

I am Shobha from Processor Systems India,Pvt.Ltd.

We are looking for PCB Design engineers, preferably diploma holders.
Candidates should have 2-3 yrs experience with Cadence Allegro tools.

Familiarity with Cadence Concept/Allegro tools in all phases of hardware development including: schematic entry, parts creation, understands the requirements of the constraints, manually generated constraints and board layout. Generation of fabrication and assembly drawings and documentation

Must be proficient with High speed board design/layout, familiar with high density BGA's, blind and buried via's.

If you have any resumes matching the above requirements,kindly forward it to me.

with regards and thanks,
shobha

[Guest]

SHASHIKANT.V
Email :Shashikant0811 AT gmail.com

CAREER OBJECTIVE
“To work in an intellectual and challenging and objective” work environment, where I can enhance my skills and strengthen in conjunction with company goals.
ACADEMIC QUALIFICATION
- B.E in Electronics & Communication from KNS Institute of Technology,
Bangalore Visvesvaraya Technological University.
Percentage :55.56 %
Year of completion :2011
- PUC from Government Boys PRE-University College, Bangalore.
- Additional skill : A course on “JAVA/J2EE” at NIIT SUN MICROSYSTEM
, Bangalore.

COMPUTER PROFICIENCY & SKILLS
Operating System : Basic of Microsoft Windows XP/98/2000/2007, M.S. Office,
Server-2003,2007,2010.

Language : C, C++, and Assembly (8085, 8086, And 8051)

Tools : Xilinx, Kiel
Other Skills : Good knowledge about Basics of CCNA , DSP, CDMA, GSM.

ACADEMIC PROJECT
Project : : “PATH FINDING SYSTEM DEVELOPMENT FOR BLIND”
Duration : 4 Months
Software Used : Microcontroller 89c51.
Details of Project : In this project, we have used RF&IR transmitter which help
the blind people in the traffic.
Under the guidance of Asst Prof Mr. Ashok Kumar (ECE).
Hardware used : RF transmitter and receiver, Temperature sensor , Fire sensor,
IR transmitter and receiver, Relays.
STRENGTHS
- Self-Learner, Quick learner, Organizer, Creativity, Problem Solving capability.
- Honest, hard working, sincere and punctual.

[Guest]

RESUME
M.MURALI
Email-id muralimunaswamy AT gmail.com

________________________________________
Objective :
A challenging position as an electronic communication engineer can deploy and use technical, academic knowledge and experience in the best possible method to growth the organization.
Academic records :
Degree College University/ Institution Year passing % Of Marks
B.E(ECE) Oxford Engineering
College, Trichy. Anna university of technology, Trichy. 2011 75.68
HSC Govt. Hr. Sec. School, Athimanjeripet. State board 2007 69.91
SSLC Govt. Hr. Sec. School,
Athimanjeripet. State board 2005 80
Technical skills :
Languages : C, C++.
Operating Systems : Windows XP and Vista.
Tools : Xilinx, Altera, Embest IDE, Mat lab, Cadence, Orcad.
Mini projects :
Title : 1. Soil moisture controller
Using AND gate the moisture content in the soil is detected.
2. Rain water wiper.
The water sensor is used to detected water and automatically the shutter is closed.
Project :
Title : Optimized adder circuit using nor gates in cadence tool.
Novel implementations of adders and majority circuits evolved using universal gates contain fewer transistors than the smallest existing implementations of other gate circuits. So these gates significantly improves the success rate of the search process and reducing delay. Also power consumption has been found to be less.
Areas of interest :
Digital electronics, VLSI, Embedded.
Extracurricular activities :
- Member ISTE,
- Member IETE,
- NSS volunteer.
Achievements :
- First prize for recitation competition from Andhra Samskrithi Manjari, Athimanjeripet.
- Second prize for mini project of “Rain water wiper “in Oxford engineering college, Trichy.
- Presented a paper on “Wireless sensor networks in monitoring crop cultivation “in Cape institute of technology, Tirunelveli.
- Presented a paper on “Implementation of wire less access nodes “in Gnanamani college of engineering, Namakkal.
- Presented a paper on “An ATPGA for low power VLSI design using ring counter and LFSR” in Indra Ganesan College of engineering, Trichy.
- Presented a paper on “Wireless sensor networks in monitoring crop cultivation” in Sona college of Technology, Salem.
Workshop and In-plant training :
- Undergone In-Plant training in BSNL, Trichy, for five days from 16-06-09 to
20-06-2009.
- Undergone In-Plant training in Blue Chip Technologies, Trichy from 07-12-2009 to
14-12-2009.
- Participated in IETE faculty development programme on Metamaterials and Microwave Integrated circuits in Shri Angalamman college of engineering and technology, Trichy.
- Attended Soft Skill Development programme in Oxford College, Trichy for five days from 23-08-2010 to 28-08-2010.
Work experience :
Organization name : Oxford Engineering College.
Role : Research Associative.
Duration : 3 Months (3rd October 2011 to 8th December 2011).

[Guest]

VISHWANATH.J
E-mail : vishwa096 AT gmail.com
CAREER OBJECTIVE
Intend to build a career with an organization which will help to explore myself and contribute to the organization's goals by effectively using the conceptual skill and knowledge gained through education.
EDUCATIONAL QUALIFICATION
M.TECH in VLSI Design and Embedded Systems (2011) from P.E.S.C.E, VTU Extension Centre, Mandya, V.T.U with CGPA : 7.92/10.
B.E in Electronics and Communication Engineering from Acharya Institute of Technology, Bangalore, V.T.U with FIRST CLASS Degree.
TECHNICAL SKILLS
- Languages Known : Basics of C, Verilog, VHDL
- Assembly Languages : 8051, 8086
- IC Design Exposure : Basic knowledge on CMOS Fabrication Process
Exposure to Analog and Mixed Signal Blocks
- Tools Known : Basic skills in Cadence, Xilinx, ModelSim and MatLab
- Operating Systems : Windows 98/2000/XP/ 7
STRENGTH
- A practical & systematic approach towards work
- Good Communication, Presentation, Analytical and Problem solving skills.
- Good Interpersonal skills
- Leadership Capabilities
- Hard working with ability to learn and adopt new procedures quickly
ACADEMIC PROJECT IN M.TECH
Title : “FPGA based Implementation of Efficient Architecture for a Bi-Quad Filter”
Tools used : Xilinx 10.1 ISE, FPGA Spartan-3A
Team Size : 1
Role : Coding with Verilog and Implementation
Organization : P.E.S.C.E, Mandya
Achievement : M.Tech Project Paper Selected and further Presented in National Conference held at DR.AIT, Bangalore.
Description : The project deals with the implementation of area efficient Biquad filter using folding technique and register minimization techniques. Folding minimizes the no. of components required but increases the registers, hence we minimize number of registers using register minimization technique called lifetime analysis. Hence comparing the 3 architectures shows the minimization of the resources and further the architecture is implemented FPGA Spartan 3A kit.
ACADEMIC PROJECT IN B.E
Title : “GSM Based Automatic Electric Billing and Cutoff System”
Technologies Used : 8259 Micro-Controller & GSM
Team Size : 4
Role : Model Design and Coding for LCD
Organization : Acharya Institute of Technology
Description : This is a micro-controller based project, deals with measuring amount of power consumed & displaying amount on the LCD screen & also sending electric bill amount to consumer via GSM module. Similarly power cutoff is done automatically if consumer does not pay the bill within specified date. As soon the consumer pays the bill, the connection is re-established automatically by sending a message to micro controller module at home from the sub-station, and a sms notification will also be delivered to the consumer as well as displayed on LCD screen.¬¬¬¬
DECLARATION
The above information provided by me is correct to the best of my knowledge and i shall be grateful if you provide me the chance to work in your organization.
Place : Bangalore
Date :
Vishwanath.J

[Guest]

Hi. I am Asha, i have completed BE in 2008. I am having One and Half year Experience in Product developement and Designing Using Corel Draw Tool. But I would Like to Training on cadense Tool and also I want to know the Frees and Duration and Placement of the Training. Can you Please reply for this?