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[QUOTE=ijt.viji;208221][B]Company Name  [/B]: Interra Systems (interrasystems.com)
[B]Company Location  [/B]: Bangalore 
[B]Designation  [/B]: Virtual Prototype Design Engineer

[URL]http://www.interrasystems.com/eda/careers.php[/URL]

[B]Careers  [/B]:
[B]1)Virtual Prototype Design Engineer[/B]
[B]Job Code [/B]: IMCVP1
Work Experience Requirements
Proficiency in System C, embedded  C and C++ is must
Minimum 3 years hands on experience on Virtual Prototype module development, verification
Fundamental knowledge  of processor architecture, peripheral interface, different bus architecture
Exposure to mobile chip set/product will be added advantage with preference ARM cores
Work experience on VAST tools and VC++ is a plus
Familiarity with Configuration management Systems, preferably Clear case
[B]Education Requirements [/B]: B.E/B.Tech or M.E/M. Tech in EE/CS from reputed institution

[B]2)Virtual Prototype Verification Engineer[/B]
[B]Job Code [/B]: IMCVP2
Work Experience Requirements
Minimum 2 to 4 years of industry experience
Proficiency in Embedded C programming, verification approaches is must
Good exposure to boot code flow, board/VP bring up
Hands on experience of system debugging tools like Lauterbach /any other debug tools, software flow analysis, root cause of failure analysis
Fundamental knowledge  of processor architecture, peripheral interface, different bus architecture
Work exposure on verification coverage tools like code coverage, Quality Center, ReqPro is added advantage
Exposure to mobile chip set/product will be added advantage with preference ARM cores
Familiarity with Configuration management Systems, preferably Clear case
[B]Education Requirements [/B]: B.E/B.Tech or M.E/M. Tech in EE/CS from reputed institution
[B]
3)Virtual Prototype RTL co-Verification Engineer[/B]
[B]Job Code [/B]: IMCVP3
Work Experience Requirements
Minimum 4 to 5 years of industry experience
Proficiency in Specman –e , VHDL , Verilog , C/C++, Perl is a must
Familiarity with System C and participation in specman verification of a reference model written in C/C++/System C is needed
Expertise in functional verification and debugging of ASIC / VLSI Designs using Specman-e verification language with a good exposure to EDA Verification tools from Mentor
Expertise in development of BFMs, Test plan, Test cases and Vmanager Flow
Hands on experience in developing and debugging Score boards , preferably with ARM processors, eVCs and dealing with c/c++ reference models
Knowledge on code coverage and functional coverage analysis is essential
Must have actively participated in a Complex SoC / IP Verification Team either at block level or top level using Specman
Mandatory Skills
Experience with Unix and Windows-XP development environments
Familiarity with System Verilog will be an added advantage
Familiarity with Configuration management Systems, preferably Clear case
Good understanding of Microprocessor, Micro-controllers, SoC architecture, bus protocols -particularly AMBA AHB, wireless baseband related peripherals, etc.
[B]Education Requirements [/B]: B.E/B.Tech or M.E/M. Tech in EE/CS from reputed institution

[B]Please send your resumes to [/B]: [EMAIL="HRindia@interrasystems.com"]HRindia@interrasystems.com[/EMAIL].

[B]Contact us  [/B]:
Interra Systems
Kalyani Platina, No.24, Phase I, 2nd Floor,
EPIP Zone, Whitefield,
Bangalore – 560066[/QUOTE]

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