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[QUOTE=digambar006767;172469]Mr.Sasane Digambar Dattatray
 [b]Email ID [/b]:digambar006767 AT gmail.com 
 
 [b]Career Objective [/b]:
To work in a healthy, innovative and challenging environment extracting the best out of me, which is conducive to learn and grow at professional as well as personal level thereby directing my future endeavors as an asset to the organization. 
[b]Educational Qualifications [/b]:
PG/Degree Year Of Passing University/Board Percentage Grade
Final Year of BE (E&TC.)
 2010-11 Pune University 60.52% First Class
Third Year of BE (E&TC.) 2009-10 Pune University 54.13% Second Class
Second Year of BE (E&TC.) 2008-09 Pune University 50% Second Class
DIPLOMA Final Year
(E&TC.) 2007-08 MSBTE 76.24% First Class
H.S.C. 2004-05 MUMBAI BOARD 60.67% First Class
S.S.C 2002-03 MUMBAI BOARD 72.13% First Class
[b]Software Skill Set [/b]:
Languages C, VHDL, Assembly Language programming
Documentation Tools MS-Office.
Hardware Knowledge Assembly & Testing.
Operating systems Windows, DOS.
Extra Activity 3 Days Workshop on the “BASICS OF ROUTING AND SWITICHING”
[b]Curriculum Seminars [/b]:
 “Image Processing Using Xilinx System Generator on FPGA”
[b]Work Experience [/b]:
[b]- Company [/b]: Symtronics Automation Pvt. Ltd, Bhosari MIDC, Pune.
[b]- Designation [/b]: Service Engineer.
[b]- Experience [/b]: 16th August 2011 to till date.
[b]- Responsibilities [/b]:
- Installation, commissioning and troubleshooting of Chopper Box (Used for Air Conditioning) and Monitoring Air Conditioning System on Indian Submarines.
[b]- Tasks Performed [/b]:
- Commissioning of Chopper Box on INS Shishumar.
- Troubleshooting of various problems related to cooling system on INS. Shankush & INS Shalky.
- Testing & troubleshooting of various cards used in Chopper Box.
[b]Curriculum Project Profile [/b]:
1. AVR based Low Speed Oscilloscope
Year 2010
Done for Mini Project for 3rd year degree
Language Embedded C
Description We designed compact CRO for low specification using graphical LCD.
[b]Specification DC power supply [/b]:12V
[b]Frequency [/b]:5KHz(square wave)
[b]Voltage input [/b]:24V/30Vdc
Team Size 3
Duration 6 month
2. Architecture for image processing using Xilinx system generator on FPGA
Year 2011
Done for Final year project
Language Mat lab ,VHDL
Description We used the DSP based Xilinx System Generator software (XSG) for implementing image processing on FPGA. These projects offer an alternative for DIP through a graphical user interface that combines MATLAB, Simulink and XSG. 
XSG does not replace hardware description language (HDL)-based design, but does make it possible to focus our attention only on the critical parts.
Team Size 3
Duration 1 year
[b]Strength [/b]:
1. Positive Attitude.
2. Working in a Team.
3. Good Listener.
4. Good grasping and analyzing skills.
5. Quick Learner.[/QUOTE]

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